Circuit board

ABSTRACT

A circuit board includes an inner circuit substrate and an outer circuit substrate electrically connected to the inner circuit substrate. The outer circuit substrate includes an outer dielectric layer and an outer circuit layer facing the inner circuit substrate embedded in the outer dielectric layer. A portion of the outer circuit layer facing away from the inner circuit substrate protruding from the outer dielectric layer. The circuit board can increase contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the circuit board.

CROSS-REFERENCE TO RELATED APPLICATIONS

This is a divisional application of patent application Ser. No.17/335,059 filed on May 31, 2021, assigned to the same assignee, whichis based on and claims priority to China Patent Application No.202110402159.6 filed on Apr. 14, 2021, the contents of which areincorporated by reference herein.

FIELD

The subject matter herein generally relates to circuit boards, and moreparticularly, to a circuit board and a method for manufacturing thecircuit board.

BACKGROUND

Circuit boards include dielectric layers and circuit layers formed onthe dielectric layers. However, such a circuit board may be very thick.Furthermore, a contact area between the circuit layer and the dielectriclayer is limited, which reduces adhesion between the circuit layer andthe dielectric layer.

BRIEF DESCRIPTION OF THE DRAWINGS

Implementations of the present technology will now be described, by wayof example only, with reference to the attached figures.

FIG. 1 is a cross-sectional view of an embodiment of an inner circuitsubstrate.

FIG. 2 is a cross-sectional view showing a single-sided copper-cladlaminate covering the inner circuit substrate of FIG. 1 .

FIG. 3 is a cross-sectional view showing the copper-clad laminate ofFIG. 2 etched to form a groove.

FIG. 4 is a cross-sectional view showing an outer dielectric layeretched from the groove of FIG. 3 to obtain a circuit groove and a blindhole.

FIG. 5 is a cross-sectional view showing a copper-plated layer formed inthe circuit groove and the blind hole and on a copper layer of FIG. 4 .

FIG. 6 is a cross-sectional view showing the copper-plated layer and thecopper layer of FIG. 5 etched to form an outer circuit layer.

FIG. 7 is a cross-sectional view of a product after processes of FIGS. 2to 6 are repeated.

FIG. 8 is a cross-sectional view showing a solder mask with an openingformed on the outer circuit substrate of FIG. 7 , thereby obtaining acircuit board.

FIG. 9 is a flowchart of an embodiment of a method for manufacturing acircuit board according to the present disclosure.

FIG. 10 is a sub-flowchart of blocks in the method of FIG. 9 .

DETAILED DESCRIPTION

It will be appreciated that for simplicity and clarity of illustration,where appropriate, reference numerals have been repeated among thedifferent figures to indicate corresponding or analogous elements. Inaddition, numerous specific details are set forth in order to provide athorough understanding of the embodiments described herein. However, itwill be understood by those of ordinary skill in the art that theembodiments described herein can be practiced without these specificdetails. In other instances, methods, procedures, and components havenot been described in detail so as not to obscure the related relevantfeature being described. Also, the description is not to be consideredas limiting the scope of the embodiments described herein. The drawingsare not necessarily to scale, and the proportions of certain parts maybe exaggerated to better illustrate details and features of the presentdisclosure.

The term “comprising,” when utilized, means “including, but notnecessarily limited to”; it specifically indicates open-ended inclusionor membership in the so-described combination, group, series, and thelike.

Some embodiments of the present disclosure will be described in detailwith reference to the drawings. If there is no conflict, the embodimentsand features can be combined with each other.

A method for the manufacturing of a circuit board 100 is provided inaccordance with an embodiment. The method is provided by way of example,as there are a variety of ways to carry out the method. Referring toFIG. 9 , the method can begin at block 1.

In block 1, referring to FIG. 1 , an inner circuit substrate 10 isprovided.

The inner circuit substrate 10 can be a flexible circuit board, a rigidcircuit board, or a rigid-flexible circuit board.

The inner circuit substrate 10 includes an inner dielectric layer 12 anda number of first conductive pillars 14. Each first conductive pillar 14penetrates opposite surfaces of the inner dielectric layer 12.

The inner dielectric layer 12 can be made of at least one of polyimide(PI), liquid crystal polymer (LCP), modified polyimide (MPI),polypropylene (PP), and polytetrafluoroethylene (PTFE).

The inner circuit substrate 10 can further include at least one innercircuit layer (not shown) electrically connected to the first conductivepillar 14. That is, the inner circuit substrate 10 can be a single-layercircuit substrate, a double-layer circuit substrate, or a multi-layercircuit substrate.

In block 2, referring to FIG. 2 , a single-sided copper-clad laminate 20is formed on the inner circuit substrate 10. The single-sidedcopper-clad laminate 20 includes an outer dielectric layer 22 and acopper layer 24 stacked in sequence. The copper layer 24 is disposed ona surface of the outer dielectric layer 22 facing away from the innercircuit substrate 10.

The single-sided copper-clad laminate 20 can be formed on one surface ofthe inner circuit substrate 10. The single-sided copper-clad laminate 20can also be formed on each surface of the inner layer circuit substrate10.

In block 3, referring to FIGS. 3 and 4 , the single-sided copper-cladlaminate 20 is etched to form a circuit groove 244. The circuit groove244 penetrates the copper layer 24 and a portion of the outer dielectriclayer 22.

The outer dielectric layer 22 can be made of at least one of polyimide,liquid crystal polymer, modified polyimide, polypropylene, andpolytetrafluoroethylene.

In at least one embodiment, the single-sided copper-clad laminate 20 isetched to form the circuit groove 244. During the etching process, thecopper layer 24 is first etched, and then the portion of the outerdielectric layer 22 adjacent to the copper layer 24 is etched to formthe circuit groove 244. That is, the circuit groove 244 penetrates thecopper layer 24 but does not penetrate the outer dielectric layer 22.

In some embodiments, a blind hole 245 is also formed together with thecircuit groove 244, and first conductive pillar 14 is partially exposedfrom the blind hole 245.

In some embodiments, referring to FIG. 10 , the formation of the circuitgroove 244 and the blind hole 245 may be carried out as follows.

In block 301, referring to FIG. 3 , the copper layer 24 is etched toform a slot 242, and the outer dielectric layer 22 is exposed from theslot 242.

In block 302, referring to FIG. 4 , the outer dielectric layer 22exposed from the slot 242 is etched by a plasma etching process to formthe circuit groove 244 and the blind hole 245. A depth of etching of thecircuit groove 244 and the blind hole 245 can be controlled by theetching time or the power applied in the plasma etching process.

In block 4, referring to FIG. 5 , a copper-plated layer 30 is formed inthe circuit groove 244 and on a surface of the copper layer 24.

The copper-plated layer 30 may be formed by electroplating.

In some embodiments, the copper-plated layer 30 further infills theblind hole 245 and is connected to the first conductive pillar 14.

In block 5, referring to FIG. 6 , the copper-plated layer 30 and thecopper layer 24 are etched to form an outer circuit layer 42, therebyobtaining the circuit board 100.

A portion of the outer circuit layer 42 facing the inner circuitsubstrate 10 is embedded in the outer dielectric layer 22. A portion ofthe outer circuit layer 42 away from the inner circuit substrate 10protrudes from the outer dielectric layer 22. A portion of the outercircuit layer 42 is embedded in the outer dielectric layer 22, whichincreases the contact area between the outer circuit layer 42 and theouter dielectric layer 22, thereby improving adhesion therebetween. Inaddition, the outer circuit substrate 40 is reduced in thickness,thereby reducing the overall thickness of the circuit board 100.

In some embodiments, the copper-plated layer 30 in the blind hole 245forms a second conductive pillar 44. The second conductive pillar 44 isconnected to the first conductive pillar 14 and the outer circuit layer42.

The outer dielectric layer 22, the outer circuit layer 42 and the secondconductive pillar 44 cooperatively form an outer circuit substrate 40.The outer circuit substrate 40 is electrically connected to the innercircuit substrate 10.

In some embodiments, referring to FIG. 7 , other circuit layers can bebuilt up and formed. The building-up process can be carried out byrepeating the processes of blocks 2 to 5.

In some embodiments, the method for forming the circuit board 100 mayfurther include the following blocks.

In block 6, referring to FIG. 8 , a solder mask 50 is applied to cover asurface of the outer circuit substrate 40 facing away from the innercircuit substrate 10, and an opening 52 is formed on the solder mask 50,so that a portion of the outer circuit layer 42 is exposed from theopening 52. Then, the circuit board 100 is obtained.

The solder mask 50 covers a surface of the outer dielectric layer 22away from the inner circuit substrate 10, and the solder mask 50 furthercovers the outer circuit layer 42. The portion of the outer circuitlayer 42 away from the inner circuit substrate 10 is embedded in thesolder mask 50. The opening 52 penetrates the solder mask 50. Theportion of the outer circuit layer 42 exposed from the opening 52 is asolder pad 422. The soldering pad 422 can allow connections to aconductor (not shown), so as to be electrically connected to othercircuit boards (not shown) through the conductor.

In some embodiments, when the outer circuit layer 42 is formed, thecopper-plated layer 30 and/or the copper layer 24 are also etched, sothat a surface of the portion of the outer circuit layer 42 exposed fromthe opening 52 has several planes. For example, the surface of theportion of the outer circuit layer 42 can be step-shaped or have groovesat various depths. The portion of the outer circuit layer 42 exposedfrom the opening 52 forms the solder pad 422, to increase a contact areabetween the solder pad 422 and the conductor and improve adhesionbetween the conductor and the solder pad 422. In some embodiments, theopening 52 is combined with the outer circuit substrate 40 to form agroove 55. When the circuit board 100 is electrically connected toanother circuit board, liquid solder can be injected into the groove 55.During a soldering process, the groove 55 confines the liquid solder andthus prevents undesired electrical connections between the two circuitboards.

Referring to FIGS. 6 to 8 , a circuit board 100 includes an inner layercircuit substrate 10 and an outer circuit substrate 40, and the outercircuit substrate 40 is disposed on the inner layer circuit substrate10.

The inner circuit substrate 10 can include an inner dielectric layer 12,an inner circuit layer, and a number of first conductive pillars 14.Each first conductive pillar 14 penetrates the inner dielectric layer12, and the inner circuit layer is disposed on the surface of the innerdielectric layer 12 electrically connected to the first conductivepillar 14.

In some embodiments, the inner circuit substrate 10 can be asingle-layer circuit substrate, a double-layer circuit substrate, or amulti-layer circuit substrate. When the inner circuit substrate 10 is amulti-layer circuit substrate, the inner circuit substrate 10 furtherincludes other circuit layers embedded in the inner dielectric layer 12.

The outer circuit substrate 40 can include an outer dielectric layer 22,an outer circuit layer 42, and a second conductive pillar 44, the outercircuit substrate 40 being electrically connected to the inner circuitsubstrate 10. A portion of the outer circuit layer 42 facing the innercircuit substrate 10 is embedded in the outer dielectric layer 22. Aportion of the outer circuit layer 42 away from the inner circuitsubstrate 10 protrudes from the outer dielectric layer 22. A portion ofthe outer circuit layer 42 is embedded in the outer dielectric layer 22,which increases the contact area and thus improving adhesion between theouter circuit layer 42 and the outer dielectric layer 22. In addition,part of the outer circuit layer 42 is embedded in the outer dielectriclayer 22, improving adhesion between the outer circuit layer 42 and theouter dielectric layer 22. A thickness of the outer circuit substrate 40is reduced, reducing the overall thickness of the circuit board 100.

The second conductive pillar 44 penetrates the outer dielectric layer 22and is connected to the first conductive pillar 14 to electricallyconnect the outer circuit substrate 40 and the inner circuit substrate10. The second conductive pillar 44 is further electrically connected tothe outer circuit layer 42.

Referring to FIG. 8 , in some embodiments, the circuit board 100 furtherincludes a solder mask 50. The solder mask 50 is disposed on the outercircuit substrate 40 away from the inner circuit substrate 10. Thesolder mask 50 covers the outer dielectric layer 22 and the outercircuit layer 42. A portion of the outer circuit layer 42 away from theinner circuit substrate 10 is embedded in the solder mask 50.

The solder mask 50 includes an opening 52. The outer circuit layer 42includes solder pads 422. The solder pads 422 are exposed from theopening 52. The solder pad 422 allows electrical connections to othercircuit boards. In some embodiments, when the circuit board 100 iselectrically connected to other circuit boards, liquid solder can beinjected into the opening 52 first. During the soldering process, aperiphery of the opening 52 prevents the liquid solder from escaping andcausing undesired connections between the two circuit boards.

A surface of the solder pad 422 exposed from the opening 52 can haveseveral planes, including but not limited to being step-shaped or havinggrooves at various depths, which increases a contact area between thesolder pad 422 and the conductor for electrical connections, andimproves adhesion between the conductor and the solder pad 422. In theembodiment, the surface of the solder pad 422 exposed from the opening52 is step-shaped.

In some embodiments, the inner circuit substrate 10 and the outercircuit substrate 40 can also be provided with other circuit substrateselectrically connected to each other as required.

It is to be understood, even though information and advantages of thepresent embodiments have been set forth in the foregoing description,together with details of the structures and functions of the presentembodiments, the disclosure is illustrative only; changes may be made indetail, especially in matters of shape, size, and arrangement of partswithin the principles of the present embodiments to the full extentindicated by the plain meaning of the terms in which the appended claimsare expressed.

What is claimed is:
 1. A circuit board, comprising: an inner circuitsubstrate; and an outer circuit substrate electrically connected to theinner circuit substrate, and the outer circuit substrate comprising: anouter dielectric layer; and an outer circuit layer facing the innercircuit substrate embedded in the outer dielectric layer, a portion ofthe outer circuit layer facing away from the inner circuit substrateprotruding from the outer dielectric layer.
 2. The circuit board ofclaim 1, further comprising a solder mask, wherein the solder mask isdisposed on the outer circuit substrate away from the inner circuitsubstrate; the solder mask comprises an opening, the outer circuit layercomprises a solder pad exposed from the opening.
 3. The circuit board ofclaim 2, wherein a surface of the solder pad exposed from the opening isnot on a same plane.
 4. The circuit board of claim 3, wherein thesurface of the solder pad is step-shaped or have grooves at variousdepths.
 5. The circuit board of claim 1, wherein the inner circuitsubstrate comprises an inner dielectric layer and a first conductivepillar, and the first conductive pillar penetrates the inner dielectriclayer; the outer circuit substrate further comprises a second conductivepillar electrically connected to the outer circuit layer; the secondconductive pillar is connected to the first conductive pillar.